(ExpressProject "Fig5-12" (Folder "Design Resources" (Folder "Library")) (Folder "Simulation Resources" (DefaultFolder "In Design") (UserName "Standard") (LastModified "Sun Mar 19 00:57:22 2006") (Folder "In Design" (File ".\circuito.vhd" (Type "VHDL Netlist")) (File ".\estimulo.vhd" (Type "VHDL Netlist")) (Document 5 ".\circuito.vhd" (Window "44 0 1 160 378 -1 -1 88 752 88 358")) (Document 5 ".\estimulo.vhd" (Window "44 0 1 -1 -1 -1 -1 110 774 110 380")) (Options (AssertBeep 1) (AssertLog 1) (AssertMsg 1) (AssertStop 1) (BreakBeep 1) (BreakLog 1) (BreakMessage 1) (BreakStop 1) (DisableLoopChecking 0) (FileOpen "C:\Mis documentos\Ejemplos\Puertas lógicas\Subcircuito de alarma") (InstructionStep 1) (InteractiveUpdate 1) (ITCEnabled 1) (ListDisplayTop 1) (LogTimeStamp 1) (MiscOptLastPage 0) (PlaAddToProject 1) (PlaClockToOutput 0) (PlaCombinational 0) (PlaResolution -1) (PlaSetupTime 0) (PlaSpeedGrade 15) (PlaTriStateEnable 0) (Radix 0) (RunResolution 2) (RunTime 10000) (SDFTiming 1) (TimeCursorSnap 0) (TimingBeep 0) (TimingLog 1) (TimingMsg 0) (TimingStop 0) (VHDLStandard 1) (WaveDisplayTop 1))) (Folder "Timed")) (Folder "Outputs") (Folder "Referenced Projects"))